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REQUIRED Principal Digital Design Engineer (Mixed Signal team) Senior RFIC Design Engineer Senior Digital Design Engineer (Mixed Signal team) Analogue Design Engineer Job Vacancy Positions Open in UK / USA / EUROPE / INDIA / AUSTRALIA for international candidates with skills in RTL, VHDL, Verilog, GSM, DECT or Other Mobile COM, communication, RFIC, SPICE, RFIC Blocks, RF chips, RFIC design, RF system, Cadence, Hspice, CMOS, Circuits, Switched capacitor circuits or converters A/D, D/A , AD, DA, Analog digital,Experience in transistor-level digital design desirable knowledge of Verilog HDL for modelling.

JOBS JOB EMPLOYMENT VACANCIES RECRUITMENT RECRUITER
RECRUITING VACANCY EMPLOYMENT AGENCY PLACEMENT FIRM PLACEMENTS HUMAN RESOURCES MAN POWER CAREER OPPORTUNITIES EMPLOYMENT BUREAU EMPLOYMENT EXCHANGE
CONSULTANTS JOBS CONSULTANTS Principal Digital Design Engineer (Mixed Signal team) Senior RFIC Design Engineer Senior Digital Design Engineer (Mixed Signal team) Analogue Design Engineer Job Vacancy Positions Open in UK / USA / EUROPE / INDIA / AUSTRALIA for international candidates with skills in RTL, VHDL, Verilog, GSM, DECT or Other Mobile communication, COMMUNICATION, TELECOM, VOICE, DATA COMMUNICATION, TELECOMMUNICATION, RFIC, SPICE, RFIC Blocks, RF chips, RFIC design, RF system, Cadence, Hspice, CMOS, Circuits, Switched capacitor circuits or converters A/D, D/A , AD, DA, Analog digital, Experience in transistor-level digital design desirable knowledge of Verilog HDL for modelling.

Position
Senior RFIC Design Engineer.
Exp. in yrs.
4+ Yrs
Domain Knowledge
IC Designer Eng.
Primary Skills
RF Design, RFIC Design Evaluation ,Digital Audio Broad Cast(DAB),
BiCMOS
Secondary Skills
DAB & Circuit blocks for Mobile Communication.
Additional comments
Responsible for design of RFIC blocks using Cadence / Hspice, Layout
Eng.

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Position
Senior Digital Engineer (Mixed signal Team).
Exp. in yrs.
4+ Yrs
Domain Knowledge
Digital Mixed Signal Engineering
Primary Skills
Mixed Signal as part of LSI Design, Std.
Cell ASIC design(CBIC) with CMOS processes, Mixed Signal / RF.
Secondary Skills
Integrated DRAM.CPU & Logic.
Additional comments
Design mixed signal devices for mobile communications, Design (RTL
level using Verilod )

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Position
ASIC Design Engineer.

Exp. in yrs.
3+ Yrs
Domain Knowledge
ASIC Design Engineering.
Primary Skills
VHDL/ Verilog prog. Synthesis & simulation
Secondary Skills
C/C++ Programming
Additional comments
Good understanding of RISC CPU systems & Pipeline
micro-architecture.
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Position
Senior Functional Consultant

Exp. in yrs.
7+ Yrs
Primary Skills
Min 4 yrs in Oracle Applications 11i implementation.
Should know all finance modules viz. GL, AP, AR, FA, Cash.
Minimum two full project implementation experience.
Secondary Skills
Knowledge on any other module like Order Management including workflow, Purchasing ,iProcurement Additional comments Good Communication Skills
Experience
Must have 2+Yrs of exp. from a reputed organaisation with C++
exp.
Education
Degree qualified, preferably with a Computing bias
Technical Experience
Visual C++ (VB 6.0 also useful as an additional skill).
COM+. MSMQ 1.0 or MSMQ 2.0 Queued Components. DCOM and distributed component programming. Data access libraries like ADO, OLE DB. clustering technologies. Component design and application design methodologies. Web technologies like XML, SOAP, WSDL, UDDI also a bonus. Knowledge of insurance broking would be an advantage.
Role
Designing the overall systems architecture Designing and building bespoke software components Integrating third party components in to the system Setting up and operating the hosting site for the system Development of the system and supporting applications and systems Support for the system and the company's customers.Development, support and troubleshooting of the internal company dsystems and networks
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Vacancy
Principal Digital Design Engineer (Mixed Signal team)

The Role
Working as part of the Mixed Signal team, specific Key Result Areas willinclude:
Responsibility for design of sub-systems (consisting of multiple modules): - specification generation; - design (RTL level using verilog); - and implementation (i.e. synthesis and test). Supervision of 2 to 3 engineers to lead chip design in its entirety. Project management. Deliverables.
Core Skills
Achievement Drive Commitment to deliver and a strong sense of ownership. Specialist Expertise good technical knowledge. Teamwork & Co-operation Leadership skills will be required in this position but previous experience is not essential. Communication Skills Good communications skills. Any experience of working with the Japanese would be an advantage.
Technical Skills
A degree or equivalent, MSc plus. 5+ years experience. Must be able to show evidence of design experience (as detailed above) on at least 2 to 3 previous designs. Digital background (ideally within a mixed signal environment). Verilog (or VHDL) knowledge. Any system knowledge in GSM, DECT or mobile communications.
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Senior RFIC Design Engineer
The Role
Key Result Areas that will be part of the role: Responsibility for design of RFIC blocks using Cadence/ Hspice; Specification generation and interpretation; Evaluation of RF chips; Working with Layout engineers to ensure layout is completed such that track parasitics etc do not effect device performance.
Core Skills
Achievement Drive Commitment to deliver to time scales and a strong sense of ownership Initiative able to work under own initiative. Specialist Expertise Good grasp of basic RFIC design skills and general electronic engineering principles. Teamwork & Co-operation Be able to work successfully with the local and wider team in Japan.
Technical Skills
A degree (or equivalent) in Electronic Engineering or related subject 2+ years experience.
Must be able to show evidence of design experience in a RFIC environment. Experience of SPICE type simulation required, using Hspice or similar. Any RF systems knowledge an advantage.
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Senior Digital Design Engineer (Mixed Signal team)
The Role
Working as part of the Mixed Signal team, specific Key Result Areas will include:
Responsibility for design of sub-systems (consisting of multiple modules): specification generation; design (RTL level using verilog); and implementation (i.e. synthesis and test). Supervision of a graduate level engineer.
The Core Skills
Achievement Drive Commitment to deliver and a strong sense of ownership. Specialist Expertise Good grasp of basic digital design skills. Initiative Able to work under own initiative. Teamwork & Co-operation Good team player.
Technical Skills
A degree or equivalent. 2 to 3 years experience.
Must be able to show evidence of design experience (as detailed above) on at least one previous design. Digital background (ideally within a mixed signal environment). Verilog (or VHDL) knowledge Any system knowledge in GSM, DECT or mobile communications.
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Vacancy
Analogue Design Engineer
The Role
Working as part of the mixed-signal team, specific Key Result Areas will include:
Design, simulation and characterisation of analogue circuits applied to mobile communications.
The Core Skills
Achievement Drive – approaches challenges and problems with energy, enthusiasm and a determination to succeed. Analytical Thinking – quickly grasps new problems or technical issues, particularly in circuit analysis. Initiative – requires only general guidance. Planning & organising – develops clear and realistic plans to achieve
specific objectives.
Specialist Expertise – must have experience of CMOS analogue design and knowledge of industry-standard design and simulation tools.
Desirable Technical Skills
A degree in electronic engineering or equivalent. A minimum of one year experience in the design of analogue CMOS circuits. Knowledge of signal processing, switched-capacitor circuits and/or converters (A/D, D/A). Experience in transistor-level digital design desirable. Basic knowledge of Verilog HDL for modelling.
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Project Manager -- Banking Domain

1) 6 years experience doing at least one full life cycle of project management
2) Good hands on knowledge of oracle 3) Exposure to data warehousing and data migration 4) Understanding of banking space - at least one full life cycle in this space 5) Good communication skills as the person is going to be based in Singapore for close to 8 months 6) willing to travel to Singapore immediately

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Knowledge management System KMS Professionals - For Italy
Project description: Design and implementation of a Knowledge Management System for the Telecom Area.
Skills and experience Requirements:
Ability to carry out a Functional Analysis for Knowledge Management Systems. Experience and abilities in designing a structured
Knowledge-based database. Experience in the implementation of Knowledge Management. Systems on the eGain platform (mandatory requirement)

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Project Manager / Senior Programmer ATM Switch
The position calls for developing software on both the ATM and the Switch. A senior programmer with about 8 years of experience would have experience in developing software on both the ends. The ideal person our clients are looking for would have skills on both ATM and switch sides
On the switch side, person needs to know Tandem's TAL language very well. The switch is ACI and the language is Base/24 and the person needs to be proficient in it. In addition, the person needs a good knowledge of Diebold 911/912 device handlers.
On the ATM side, the person needs to know NCR's ATM language, NDC.
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Switch side developers
On the switch side, person needs to know Tandem's TAL language very well. The switch is ACI and the language is Base/24 and the person needs to be proficient in it. In addition, the person needs a good knowledge of Diebold 911/912 device handlers.
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ATM side developers
On the ATM side, the person needs to know NCR's ATM language, NDC.

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Project managers,project engineers, ATM, Switch, RFIC Design Engineer Senior Digital Design Engineer (Mixed Signal team) Analogue Design Engineer Job Vacancy Positions Open in UK / USA / EUROPE / INDIA / AUSTRALIA for international candidates with skills in RTL, VHDL, Verilog, GSM, DECT or Other Mobile communication, TELECOM, VOICE, DATA COMMUNICATION, TELECOMMUNICATION, RFIC, SPICE, RFIC Blocks, RF chips, RFIC design, RF system, Cadence, Hspice, CMOS, Circuits, Switched capacitor circuits or converters A/D, D/A , AD, DA, Analog digital, Experience in transistor-level digital design desirable knowledge of Verilog HDL for modelling.